PRACE PATC Course: Intel MIC Programming Workshop

The course discusses Intel’s new Many Integrated Core (MIC) architecture. It covers various programming and optimisation techniques for Intel Xeon Phi coprocessors.

The first 2 days provide an introduction about the Intel MIC architecture and various Intel Xeon Phi programming models, interleaved with many hands-on sessions. The hands-on sessions are done on the SuperMIC system at LRZ.

The last day presents advanced topics and talks about experiences and best practices using Intel Xeon Phi based systems like e.g. Salomon @ IT4Innovations (Czech Republic), the largest Intel Xeon Phi based system in Europe.

For more information, please see